By Himanshu Bhatnagar
Advanced ASIC Chip Synthesis: utilizing Synopsys® Design Compiler® actual Compiler® and PrimeTime®, Second Edition describes the complex techniques and strategies used in the direction of ASIC chip synthesis, actual synthesis, formal verification and static timing research, utilizing the Synopsys suite of instruments. additionally, the whole ASIC layout circulation technique special for VDSM (Very-Deep-Sub-Micron) applied sciences is roofed intimately.
The emphasis of this publication is on real-time program of Synopsys instruments, used to strive against a variety of difficulties noticeable at VDSM geometries. Readers might be uncovered to an efficient layout method for dealing with complicated, sub-micron ASIC designs. value is put on HDL coding kinds, synthesis and optimization, dynamic simulation, formal verification, DFT test insertion, hyperlinks to structure, actual synthesis, and static timing research. At every one step, difficulties similar to every part of the layout stream are pointed out, with recommendations and work-around defined intimately. additionally, the most important concerns comparable to structure, along with clock tree synthesis and back-end integration (links to format) also are mentioned at size. additionally, the e-book comprises in-depth discussions at the foundation of Synopsys expertise libraries and HDL coding kinds, distinct in the direction of optimum synthesis resolution.
goal audiences for this publication are working towards ASIC layout engineers and masters point scholars venture complex VLSI classes on ASIC chip layout and DFT suggestions.
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Advanced ASIC Chip Synthesis using Synopsys by Himanshu Bhatnagar